1. Field of the Invention
The present invention relates to positioning the sample time of an analog to digital converter in a periodic waveform.
2. Description of Related Art
It is desired to be able to position the A/D converter pulse in a very narrow window of time and to perform the correct placement over various temperature ranges, supply voltage variations, and component lot to lot variations. In the past, the window of time was set large enough so that any variations in the time placement would not exceed the window width. However, now that there is a greater demand for faster camera sensors and other equipment, this window has shrunk and the old method is no longer adequate. In the past, the time window of the A/D converter position was large enough to accommodate slight variations due to temperature variations, voltage variations and lot to lot variations. The new method is an improvement because it will now be possible to shrink the convert window, and as a result, be able to increase the maximum frequency of operation and provide optimal performance over all operating conditions.
Such variations as clock driver lot to lot variations, voltage and temperature delay variations, analog processing lot to lot variations, timing generation lot to lot variations, and A/D aperture delay lot to lot variations are critical at high speed where timing margin is near zero. These variables are continuously monitored with the present invention and corrected using a digital algorithm and a new delay line capable of xe2x80x9cjitteringxe2x80x9d the sample pulse for one full clock period.
It is an object to the present invention to automatically position the sample time of an analog to digital converter.
These and other objects are achieved in a circuit that includes a programmable delay circuit, an A/D circuit triggered by the programmable delay circuit and a jitter correction algorithm processor coupled to insert a standard signal into the A/D circuit and to control the programmable delay circuit.
Alternatively, these objects are achieved with a method that includes steps of measuring a calibration function, correlating the measured calibration circuit with a known function, and determining a jitter control delay value from a result of the step of correlating.